MEDIA ALERT: ESD Alliance Hosts Fireside Chat with Jim Hogan and Cadence’s Paul Cunningham

MILPITAS, Calif., March 26, 2019 (GLOBE NEWSWIRE) --

WHO: The Electronic System Design Alliance, a SEMI Strategic Association Partner

WHAT: Hosts a Fireside Chat with Jim Hogan, managing partner of Vista Ventures, LLC., and Paul Cunningham, corporate vice president and general manager of the system verification group at Cadence Design Systems.

WHEN: Wednesday, April 10, from 6:30 p.m. until 9 p.m. Dinner will be served at 6 p.m. The discussion will start at 7:30 p.m.

WHERE: SEMI, 673 S. Milpitas Boulevard, Milpitas, Calif.

In a far-reaching conversation, Hogan will interview Cunningham about his experience working in artificial intelligence, starting Azuro and its subsequent acquisition by Cadence in 2011 to managing Cadence’s system verification group. They will discuss Cunningham’s move 18 months ago from managing physical design tool development to system functional verification and the challenges ahead. Other topics of widespread interest that will be under discussion include open source architectures and the necessary development platforms.

About Jim Hogan and Paul Cunningham
Hogan, an experienced senior executive, has worked in the semiconductor design and manufacturing industry for more than 40 years, and serves as a board director for electronic design automation, intellectual property, semiconductor equipment, material science and IT companies.

Cunningham’s product responsibilities include logic simulation, emulation, prototyping, formal verification, Verification IP and debug. Previously, he was responsible for Cadence's front-end digital design tools, including logic synthesis and design-for-test. Cunningham joined Cadence through the acquisition of Azuro, a startup developing concurrent physical optimization and useful skew clock tree synthesis technologies, where he was a co-founder and CEO. He holds a Master of Science degree and a Ph.D. in Computer Science from the University of Cambridge, U.K.

Registration
Members of the electronic system and semiconductor design ecosystem are welcome to attend. It is open free of charge to all ESD Alliance member companies. Non-members and guests can attend for a fee of $40. Registration information can be found at: https://bit.ly/2uuaAF6

ESD Alliance’s ES Design West
The ESD Alliance will unveil ES Design West July 9-11 co-located with SEMICON West 2019 at San Francisco’s Moscone Center South Hall. It will showcase the design ecosystem’s innovation and commercial successes from IP, electronic design automation (EDA) and embedded software to design services, design infrastructure and the cloud. Program details and an exhibitor prospectus can be found at the ES Design West website. Follow ES Design West on Twitter: #ESDesignWest  and @ESDAlliance.

About the Electronic System Design Alliance
The Electronic System Design (ESD) Alliance, a SEMI Strategic Association Partner representing members in the electronic system and semiconductor design ecosystem, is a community that addresses technical, marketing, economic and legislative issues affecting the entire industry. It acts as the central voice to communicate and promote the value of the semiconductor design ecosystem as a vital component of the global electronics industry. Visit www.esd-alliance.org to learn more.

Follow the ESD Alliance
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Twitter: @ESDAlliance
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All trademarks and registered trademarks are the property of their respective owners.

For more information, contact:
Nanette Collins                                     
Public Relations for the ESD Alliance          
(617) 437-1822
nanette@nvc.com  

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