WHAT: Will co-host a panel, "Ride with the Verify Seven," moderated by Jim Hogan of Vista Ventures featuring six well-known verification leaders who grew their companies from startup to medium-sized industry player
WHEN: Monday, February 27, beginning at 7 p.m., after DVCon's Booth Crawl, until 8:30 p.m. Light refreshments and drinks will be served.
WHERE: Oak/Gateway Ballroom at the DoubleTree Hotel, San Jose, Calif.
- Andy Stein, vice president of North American sales from Avery Design Systems
- Adnan Hamid, chief executive officer (CEO) at Breker Verification SystemsPhil Moorby, chief architect at Montana
- Phil Moorby, chief architect of Montana, a Phil Kaufman Award recipient presented to him by the ESD Alliance and IEEE CEDA for inventing the Verilog language
- Raik Brinkmann, CEO of OneSpin
- Prakash Narain, Real Intent's President and CEO
- Rick Carlson, Verific's vice president of sales and advisor to seven early-stage startups
Each will express his thoughts on making it as a small company in EDA, what's coming in verification and what end-users can expect in the future. The event is open free of charge to all ESD Alliance member companies and DVCon attendees.
(Non-members of the Alliance or anyone without a DVCon badge are invited to attend for a fee of $40. Registration information and more details on the event can be found at: http://bit.ly/2kNWx6T)
About the Electronic System Design Alliance
The Electronic System Design (ESD) Alliance, an international association of companies providing goods and services throughout the semiconductor design ecosystem, is a forum to address technical, marketing, economic and legislative issues affecting the entire industry. It acts as the central voice to communicate and promote the value of the semiconductor design industry as a vital component of the global electronics industry. For more information about the ESD Alliance, visit http://www.esd-alliance.org
About OneSpin Solutions
OneSpin Solutions is a pioneer of advanced formal techniques to solve practical verification challenges. Its award winning, leading technology enables a versatile range of verification solutions, including agile design evaluation for designers, together with advanced, coverage-driven assertion based verification, and automated apps for a range of design verification tasks. In addition, Onespin provides a safety-critical formal solution for high reliability applications, a SystemC/C++ capability for High Level Synthesis (HLS) code verification, and Equivalency Checking to improve FPGA quality of results. OneSpin has grown dramatically in the last four years, and may be found at many leading electronics companies worldwide.
All trademarks and registered trademarks are the property of their respective owners.
For more information, contact: Nanette Collins Public Relations for the ESD Alliance and OneSpin Solutions (617) 437-1822 Email Contact