MoSys Compact Bandwidth Engine Development Platform Solves Memory Capacity, Access and Pin Count Challenges and Accelerates FPGA Design

Using Efficient Serial Connectivity at up to 15.6Gbps per lane, over a standard FMC interface, the new Bandwidth Engine C-FMC Platform mates seamlessly with FPGA carrier cards to reduce interconnect complexity and development time for high speed applications

SANTA CLARA, Calif. — (BUSINESS WIRE) — August 31, 2015MoSys (NASDAQ: MOSY), a leader in semiconductor solutions that enable fast, intelligent data access for network and communications systems, today announced the release of its flexible, turnkey development platform for the Bandwidth Engine® IC family. The MoSys® Bandwidth Engine 2 Compact FMC Development Kit consists of a Bandwidth Engine 2 evaluation board, MoSys IC Spotlight™ Analyzer software and host controller reference code. The Bandwidth Engine IC and development platform are designed to accelerate performance and reduce design complexity for high-speed memory applications such as look up tables, search, buffering or statistics.

Bandwidth Engine devices provide memory capacity, throughput and functional offloads to accelerate applications ranging from carrier and data center routers and switches in core, aggregation and access networks, to load balancing and security applications, including high-speed data analytics and real-time HD/4K/8K video content analysis. Bandwidth Engine ICs also have intelligent offload capabilities to accelerate a variety of operations using only a single instruction from the host.

MoSys’ IC Spotlight Analyzer is a software toolkit which enables system designers to debug and perform on-chip analysis of high-speed serial I/O channels connected with Bandwidth Engine serial memory devices, enabling rapid system bring up. The reference RTL source code for the host interface allows system developers to utilize, modify and study a variety of host interface implementations in order to optimize performance for their applications.

The FMC board is connected to the FPGA carrier card via a serial interface running up to sixteen lanes at 15.6 Gbps per lane utilizing the VITA 57.1 standard interface, which enables connectivity with a wide range of Xilinx and Altera FPGAs. The board is designed to be self-contained and can be powered and operated entirely through the FMC interface, and it also has a number of features and external connectors for debug as needed. The C-FMC board measures 76.5 mm by 69 mm and can easily fit on a standard profile PCIe card in a rackmount server chassis.

MoSys’ high-density Bandwidth Engine has demonstrated industry-leading performance with the GigaChip® Interface on the following FPGA platforms:

  • Altera® Stratix IV, Stratix V, Arria® 10 and upcoming Stratix 10 development kits available from Altera, HiTech Global and ReflexCES; and
  • Xilinx® Virtex®-6, Virtex-7, Kintex UltraScale™, Virtex Ultrascale and upcoming Ultrascale+ on development kits available from Xilinx and HiTech Global.

“As the data processing and performance requirements have increased across the entire spectrum of applications, challenges in memory bandwidth, pin count, routability and capacity are becoming pervasive. The MoSys Bandwidth Engine solves these bottlenecks by monolithically integrating a serial interface, performance memory and offload capability. When used with FPGAs, the solution delivers scalable performance and differentiated features, whether augmenting base designs or innovating an architecture from scratch,” said John Monson, VP of marketing and sales for MoSys. “We are pleased to work with our FPGA partners to enable easy connectivity to the Bandwidth Engine feature set in a compact, flexible FMC-based evaluation platform to accelerate development time and reduce system bring up risk for our mutual customers.”

"We continue to work closely with MoSys to integrate the Bandwidth Engine and new FMC boards into the Stratix and Arria platforms to maximize system performance," said Marc Clevenger, strategic marketing manager in Altera’s infrastructure business unit. "Today, we have Arria 10 FPGA boards up and running, connected to the MoSys Bandwidth Engine, and are planning future solutions based on Stratix 10 FPGA reference boards. MoSys continues to develop innovative solutions that complement the performance requirements of Altera’s FPGAs."

"The new FMC card from MoSys connects with our widely available Kintex and Virtex UltraScale development platforms to simplify the development and evaluation of new applications for mutual customers," said Kirk Saban, senior director of silicon product management and marketing at Xilinx. "The combination of Xilinx FPGAs and MoSys’ Bandwidth Engine is enabling industry leading serial memory performance. The support provided by our Kintex and Virtex UltraScale will broaden even further with the imminent availability of our UltraScale+ family devices."

"The FMC interconnect standard defines a modular, scalable IO for FPGA-based platforms," stated Jerry Gipper, VITA executive director. "We were pleased to see MoSys’ innovative adaptation of the FMC standard to support their high-speed serial memory devices which are gaining interest in the industry for their performance and ease of implementation."

The MoSys Bandwidth Engine 2 Compact FMC Development Kit is immediately available. For information about evaluation platforms, availability and pricing, contact a local MoSys sales representative at http://www.mosys.com/contact.php .

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