Incremental compilation dramatically increases productivity by allowing FPGA designers to compile portions of their design that have changed while leaving the remainder of their design intact. Incremental changes to a design can be passed through the entire tool flow efficiently, providing up to 58% speed-up compared to a non-incremental flow.
Compilation times are a critical consideration for FPGA designers. During both the design and prototype phases of an FPGA development, designers iterate their designs and verify functionality through simulation and system testing. The reduction of compilation times eliminates the bottleneck in this process and dramatically reduces the total development cycle time. In addition to compile time improvements, ACE 5.4 has achieved an average Fmax improvement of 30% compared to the initial release of ACE that supported Speedster22i FPGAs.
"Achronix changed the FPGA market when it introduced the Speedster22i FPGAs with hardened IP for high performance communication applications," said Steve Mensor, Vice President Marketing, Achronix. "The hard IP not only reduces the power and cost of implementing high performance FPGAs for communication designs, but it dramatically reduces the development time." Mensor continued, "The new incremental compilation support in ACE further reduces development times which allows customers to get their designs to market significantly faster."
ACE 5.4 also adds a new, highly-configurable SerDes tuning GUI. This enables advanced, real-time SerDes link tuning and optimization for the high-speed SerDes found on the Speedster22i family. With the SerDes link tuning GUI, designers can get their SerDes up and running in hours, further reducing their FPGA development time.
Pricing and availability
ACE 5.4 is available immediately. Please contact your local sales representative or Achronix directly.
About Achronix Semiconductor Corporation
Achronix is a privately held, fabless corporation based in Santa Clara, California. Achronix builds application targeted field programmable gate arrays (FPGAs) built on Intel's (
Achronix and Speedster are registered trademarks of Achronix Semiconductor Corporation.
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Contacts: Greg Martin Achronix Semiconductor Corporation 408-889-4142 Email Contact Susan Cain Cain Communications 408-393-4794 Email Contact